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关注：1
2013-05-23 12:21
求翻译：Verilog HDL是一种应用广泛的硬件描述语言，可用于从算法级、门级到开关级的多种抽象层次的数字系统设计。是什么意思？ 待解决
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- 离问题结束还有
Verilog HDL是一种应用广泛的硬件描述语言，可用于从算法级、门级到开关级的多种抽象层次的数字系统设计。
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2013-05-23 12:21:38
Verilog HDL is a widely used hardware description languages, can be used from the algorithm level, gate-level to switch level of more than one level of abstraction of digital system design.
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2013-05-23 12:23:18
Verilog HDL is a widely used hardware description language, which can be used for the algorithm-level, gate-level to the switch-level of various abstract level of digital system design.
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2013-05-23 12:24:58
Verilog HDL is one kind of application widespread hardware description language, available in from algorithm level, gate level to switch level many kinds of abstract level number system design.
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2013-05-23 12:26:38
Verilog HDL is a widely used hardware description languages, can be used from the algorithm level, gate-level to switch level of more than one level of abstraction of digital system design.
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2013-05-23 12:28:18
Verilog HDL is a widely used hardware description languages, can be used from the algorithm level, gate-level to switch level of more than one level of abstraction of digital system design.
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