求翻译：实验结果证明，在本文所设计的载波同步环路中，用积分和累加器来代替传统的低通滤波器来实现低通滤波；用鉴相精度更高的反正切鉴相算法来代替传统的乘法鉴相算法来实现鉴相，并且在FPGA实现时，用CORDIC算法来实现反正切，使得环路结构更加简单，更易于实现，占用的硬件资源更少，并且环路的收敛速度和稳定性也很好，能有效的消除频偏，正确的还原出基带信号，验证了系统设计方案的正确性和可实现性，具有较好的工程应用价值。是什么意思？

Experimental results show that the designed carrier synchronization loop integral accumulator instead of the traditional low-pass filter to achieve the low-pass filter; higher phase precision arctangent phase algorithm to replace the traditional multiplication phase algorithm to implement phase and

正在翻译，请等待...

正在翻译，请等待...

Experimental results proved, in this by design of carrier synchronization loop in the, with integral and accumulator to instead of traditional of low pass filter to implementation low pass filter; with mirror phase precision more high of anyway cut mirror phase algorithm to instead of traditional of

正在翻译，请等待...