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  • 匿名
关注:1 2013-05-23 12:21

求翻译:本此毕设主要是在学习PCI Express协议的基础上,使用Xilinx的ISE工具进行PCIE IP核的设计,是什么意思?

待解决 悬赏分:1 - 离问题结束还有
本此毕设主要是在学习PCI Express协议的基础上,使用Xilinx的ISE工具进行PCIE IP核的设计,
问题补充:

  • 匿名
2013-05-23 12:21:38
This this complete set is mainly on the basis of learning pci Express protocol, ise xilinx the tools pcie ip core design,
  • 匿名
2013-05-23 12:23:18
This contribution is mainly located in the Learning PCI Express based on an agreement, the Use Xilinx PCIE IP ISE tools for the design,
  • 匿名
2013-05-23 12:24:58
This this finishes supposes mainly is in studies PCI the Express agreement in the foundation, uses Xilinx the ISE tool to carry on PCIE the IP nucleus the design,
  • 匿名
2013-05-23 12:26:38
This this is mainly in the PCI Express agreement on the basis of using Xilinx ISE tools for design of PCIE IP core,
  • 匿名
2013-05-23 12:28:18
正在翻译,请等待...
 
 
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