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2013-05-23 12:21
求翻译：His research areas cover advanced CMOS logic technology developments from front-end-of-line, middle-end-of-line, to back-end-of-line. Particularly he is interested in gate-stack module, strain engineering, silicide/contact modules, and Cu/ELK interconnects technologies. His current focuses are at sub-20nm planer transistor, 3D transistor designs, and strain related pattern density effects modeling. He is an IEEE-fellow in logic manufacturing area.是什么意思？ 待解决
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His research areas cover advanced CMOS logic technology developments from front-end-of-line, middle-end-of-line, to back-end-of-line. Particularly he is interested in gate-stack module, strain engineering, silicide/contact modules, and Cu/ELK interconnects technologies. His current focuses are at sub-20nm planer transistor, 3D transistor designs, and strain related pattern density effects modeling. He is an IEEE-fellow in logic manufacturing area.
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