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2013-05-23 12:21
求翻译：This bit is set to 1 whenever the received data input is held in the "spacing state" (logic 0) for longer than a full word transmission time, which is the total time of "start bit" + “data bits” + “parity” + “stop bits” duration, and is reset whenever the CPU reads the contents of this LSR register.是什么意思？ 待解决
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This bit is set to 1 whenever the received data input is held in the "spacing state" (logic 0) for longer than a full word transmission time, which is the total time of "start bit" + “data bits” + “parity” + “stop bits” duration, and is reset whenever the CPU reads the contents of this LSR register.
问题补充： |
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